From cd962cdb33a799a37d4ade1af023a9edf2a44a94 Mon Sep 17 00:00:00 2001 From: Jani Nikula Date: Thu, 23 May 2024 15:59:33 +0300 Subject: [PATCH 0694/1625] drm/i915: pass dev_priv explicitly to DSPSTRIDE MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the DSPSTRIDE register macro. Reviewed-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/4067b3009076492d05e80ae994f9a7bd29b56b2e.1716469091.git.jani.nikula@intel.com Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/i9xx_plane.c | 4 ++-- drivers/gpu/drm/i915/display/i9xx_plane_regs.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c b/drivers/gpu/drm/i915/display/i9xx_plane.c index ba76c952a656..34760ecd5d34 100644 --- a/drivers/gpu/drm/i915/display/i9xx_plane.c +++ b/drivers/gpu/drm/i915/display/i9xx_plane.c @@ -423,7 +423,7 @@ static void i9xx_plane_update_noarm(struct intel_plane *plane, struct drm_i915_private *dev_priv = to_i915(plane->base.dev); enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; - intel_de_write_fw(dev_priv, DSPSTRIDE(i9xx_plane), + intel_de_write_fw(dev_priv, DSPSTRIDE(dev_priv, i9xx_plane), plane_state->view.color_plane[0].mapping_stride); if (DISPLAY_VER(dev_priv) < 4) { @@ -1055,7 +1055,7 @@ i9xx_get_initial_plane_config(struct intel_crtc *crtc, fb->width = REG_FIELD_GET(PIPESRC_WIDTH_MASK, val) + 1; fb->height = REG_FIELD_GET(PIPESRC_HEIGHT_MASK, val) + 1; - val = intel_de_read(dev_priv, DSPSTRIDE(i9xx_plane)); + val = intel_de_read(dev_priv, DSPSTRIDE(dev_priv, i9xx_plane)); fb->pitches[0] = val & 0xffffffc0; aligned_height = intel_fb_align_height(fb, 0, fb->height); diff --git a/drivers/gpu/drm/i915/display/i9xx_plane_regs.h b/drivers/gpu/drm/i915/display/i9xx_plane_regs.h index e222c0333d19..049114620d93 100644 --- a/drivers/gpu/drm/i915/display/i9xx_plane_regs.h +++ b/drivers/gpu/drm/i915/display/i9xx_plane_regs.h @@ -50,7 +50,7 @@ #define DSPLINOFF(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPALINOFF) #define _DSPASTRIDE 0x70188 -#define DSPSTRIDE(plane) _MMIO_PIPE2(dev_priv, plane, _DSPASTRIDE) +#define DSPSTRIDE(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPASTRIDE) #define _DSPAPOS 0x7018C /* pre-g4x */ #define DSPPOS(plane) _MMIO_PIPE2(dev_priv, plane, _DSPAPOS) -- 2.52.0